Design Creation

Micro-architecture

Encore Semi is continuously developing and expanding its knowledge base in many architecture domains. This allows for the support of architectural and pathfinding projects, developing optimized micro-architectures and assessing system performance through advanced modeling techniques.

Encore Semi architects are accustomed to many tools for designing, analyzing and optimizing micro-architectures. Most common system-level simulation tools are:

  • Matlab/Octave
  • Simulink/Labview
  • System-Verilog/Verilog-AMS
  • System-C/C#/C++

They also are familiar with low-power techniques such as

  • Voltage Islands for Power Shut-off modes
  • Voltage Domains for multiple supplies
  • Clock Gating
  • DVFS

Specialized knowledge base has been developed and accumulated in specific architectural and functional domains, such as the ones listed below:

Advanced interfaces and protocols:

  • PCIe gen 4/4/5; NVMe
  • DDR3, DDR4, LPDDR
  • USB3
  • HDMI 1.4
  • MIPI
  • Thunderbolt 3.0
  • SAS 3.0
  • SATA 3.2

ARM knowledge base:

  • Various ARM cores (Cortex–M; Cortex-R; Cortex-A) and associated configurations
  • ARMv6x –v8x
  • AMBA; AMBA2 – 5 (AHB, AXI, etc.)
  • THUMB, THUMB 2
  • VFPv3 -5
  • NEON

X86 knowledge base:

  • x86 cores, Xeon
  • Multi-threading/Hyperthreading
  • Floating Point Unit
  • GPU

DSP knowledge base:

  • Audio Processing
  • Graphic Processing
  • Equalization
  • Adaptation
  • Clock and data Recovery

Low-Power BaseBand knowledge base:

  • Baseband Processing for
    • FDMA, SC-FDMA
    • TDMA
    • CDMA
    • OFDMA
  • Basic Vector Operations
    • Data Load
    • Vector Alignment
    • Computation
    • Vector Reduction
    • Data Storage
  • Vector Algorithm Kernels
    • FIR Filtering
    • Pattern Matching
    • Min/Max Finding
    • Viterbi-BMC/ACS
    • FFT
  • Low Power Techniques
    • Operation Chaining
    • Pipelined Execution
    • Staggered Memory Access
    • Multicycling

Performance Modeling

System performance modeling and analysis is critical to assess and later verify the performance of a system.  It requires building models to project and optimize the performance of a system that is being architected and designed, factoring the various constraints of the project.

The models are used for architecture validation and exploration, design trade-off analysis, deadlock detection, resource utilization and bottleneck analysis. These models are built with a variety of analytical and simulation tools. (I.e. Spreadsheet, SystemC, TLM 2.0, C/C++, vendor tools, etc.)

Measuring performance of a CPU architecture requires the expertise in the following domains:

  • CPU and devices memory access latency
  • Bandwidth used (memory, cache, and interconnect)
  • Cache and memory statistics
  • Utilization of resources
  • Queue occupancy
  • Bottlenecks and possible deadlocks

Encore Semi can support many modeling, analysis and validation tasks, including the following:

  • CPU or SoC performance modeling and analysis
  • Sub-system performance modeling and analysis, i.e. DDR
    • Building models in C/C++ and/or SystemC/TLM2 and perform the analysis
  • Application workload analysis and modeling
  • Pre-silicon performance estimation/verification
  • Pre-silicon power estimation
    • Finding RTL performance bottleneck/bug for a given workload
    • Match the RTL performance with the projected performance
    • Project performance and power for a number of application workload
  • Post-silicon performance or power validation
    • Analyze silicon-measured performance and power for a number of application workload.

Digital Design

From behavioral modeling using VHDL or other languages, to RTL coding, clock-tree optimization, complex state machine design or glue-logic generation, our customers can rely on the Encore Semi digital design teams to provide an optimized result.

Digital designers are used to manage noise and timing margins, parasitic inductances or capacitances, and filter power connections. Encore Semi has a solid digital design team, used to develop and integrate various IP blocks such as CPU cores (ARM, x86, etc.) and associated buses or fabrics, memory interfaces (ROM, DDR3, DDR4, SRAM, custom cache, etc.),  SerDes (PCIe Gen3/4/5, USB3.1, Thunderbolt 3.0, MIPI, HDMI 1.4, SAS 3.0, SATA 3.2, etc.).

In addition, the following specialized expertise can be supported by Encore Semi:

  • Low Power digital design
  • A/D and D/A Interfaces
  • DSP techniques (FFE and DFE equalizations)
  • Adaptation Algorithms (LMS, etc.)
  • Software programmable state machines (microcontrollers)
  • Digital Clock Recovery

RF/Analog Design

RF, Analog and Mixed-Signal design is one of the focused area and strong expertise of Encore Semi. It encompasses various domains such as:

  • Architecture
  • Circuit design

Encore Semi can support RF/AMS architectural investigations. Our experts are up-to-date with new standard developments and have a deep understanding of scalable architectures. Using tools such as Simulink, Mathlab or Verilog-AMS to tune Low Power architectures or use High-Speed techniques, they are instrumental to achieve best performance.

Combining experience in RF, Analog, Mixed-Signal and Digital Circuit Design for a variety of process technologies (CMOS, FinFET, SOI, SiGe, etc.) and PDKs, our engineers are efficient at developing RF/Analog IP blocks and integrating them into larger mixed-mode SoCs using mixed-signal co-simulation

Expertise has been developed in several domains, such as the ones listed below:

High-Speed Interfaces:

  • Optimized Data Converter (D/A and A/D) interfaces
  • High Speed circuitry and SerDes designs
  • Analog and Digital PLLs
  • DDR3/4 PHY
  • Multi-rate design
  • LDOs and multi power domain designs
  • (Low-)Power optimization and power states management
  • Calibration techniques

RF Wireless:

  • RF System design/architecture for terminals, connectivity and infrastructure
  • Advanced RF simulation using tools such as 3D MOM/FEM & FDTD simulation
  • Altair FEKO; ADS; Genesys
  • Custom antenna design